1. Technical Field
The present disclosure relates to a metal oxide alloy layer, and more particularly, to a metal oxide alloy layer having a structure in which at least two kinds of metal oxides are mixed and methods of forming the same.
2. Discussion of the Related Art
As semiconductor devices become highly integrated, a size of a cell region is reduced. As a result of the reduced-size cell region, a sufficient capacitance for stably operating a cell in a semiconductor device such as a dynamic random access memory (DRAM) device may not be obtained. As shown in the following Equation 1, the capacitance C is proportional to a dielectric constant ε and areas A of electrodes, and is inversely proportional to a distance d between the electrodes.C=εA/d  Equation 1
To increase a capacitance of a capacitor having a silicon oxide layer or a silicon nitride layer as a dielectric layer, a lower electrode of the capacitor has a cylindrical shape or a fin shape to expand an effective area of the capacitor. However, the lower electrode of the capacitor having the cylindrical shape or the fin shape is a complicated structure to manufacture.
Thus, in a conventional technology, a thin layer including a material that has a high dielectric constant is employed as the dielectric layer of the capacitor or as a gate insulation layer of a MOS transistor. The thin layer having a high dielectric constant functions to sufficiently reduce a leakage current between a gate electrode and a channel or between a lower electrode and an upper electrode while having a thin equivalent oxide thickness (EOT). Examples of the material having a high dielectric constant include metal oxide such as Al2O3, Ta2O5, Nb2O5, ZrO2, and TiO2. The metal oxide has a dielectric constant of about 10 k to about 114 k. Silicon oxide has a dielectric constant of about 3.9 k. Thus, the dielectric constant of the metal oxide is about 2.5 times to about 30 times higher than that of the silicon oxide.
However, when a hafnium oxide layer is used as a gate insulation layer and when a polysilicon layer used as a gate conductive layer is formed on the hafnium oxide layer, impurities such as boron are penetrated into a channel region so that electron mobility in the channel region is reduced. As a result, a metal oxide layer needs to have good leakage current characteristics and a high dielectric constant, which can be applied to a process for manufacturing a semiconductor device having a design rule of no more than about 70 nm.